View LTC1755_4342311.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LTC1755/LTC1756 Smart Card Interface
FEATURES
s s s s s s s s s s s s
DESCRIPTIO
s
Fully ISO 7816-3 and EMV Compliant (Including Auxiliary I/O Pins) Buck-Boost Charge Pump Generates 3V or 5V 2.7V to 6.0V Input Voltage Range (LTC1755) Very Low Operating Current: 60A > 10kV ESD on All Smart Card Pins Dynamic Pull-Ups Deliver Fast Signal Rise Times Soft-Start Limits Inrush Current at Turn On 3V 5V Signal Level Translators Shutdown Current: < 1A Short-Circuit and Overtemperature Protected Alarm Output Indicates Fault Condition Multiple Devices May Be Paralleled for Multicard Applications (LTC1755) Available in 16- and 24-Pin SSOP Packages
The LTC(R)1755/LTC1756 universal Smart Card interfaces are fully compliant with ISO 7816-3 and EMV specifications. The parts provide the smallest and simplest interface circuits between a host microcontroller and general purpose Smart Cards. An internal charge pump DC/DC converter delivers regulated 3V or 5V to the Smart Card, while on-chip level shifters allow connection to a low voltage controller. All Smart Card contacts are rated for 10kV ESD, eliminating the need for external ESD protection devices. Input voltage may range from 2.7V to 6.0V, allowing direct connection to a battery. Internal soft-start mitigates startup problems that may result when the input power is provided by another regulator. Multiple devices may be paralleled and connected to a single controller for multicard applications. Battery life is maximized by 60A operating current and 1A shutdown current. The narrow SSOP packages minimize PCB area for compact portable systems.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s s s s s
Handheld Payment Terminals Pay Telephones ATMs Key Chain Readers Smart Card Readers
TYPICAL APPLICATIO
SMART CARD PRESENT SWITCH
3.3V
1 2 3 4 C3 10F C2 10F 5 6 7 8 9 10 11 12
PRES PWR CS NC/NO GND
5V/3V CARD ALARM READY DVCC C+ AUX1IN AUX2IN DATA RIN CIN
24 23 22 21 20 19 18 17 16 15 14 13
17556 TA01
VIN LTC1755 C - VCC AUX1 AUX2 I/O RST CLK
GND
VCC AUX1
SMART CARD
AUX2 I/O RST CLK
U
C1 0.68F CONTROLLER
U
U
1
LTC1755/LTC1756
ABSOLUTE
AXI U
RATI GS
VIN to GND (LTC1755) ............................. - 0.3V to 6.5V VIN to GND (LTC1756) ............................. - 0.3V to 6.0V DVCC to GND (LTC1755) .......................... - 0.3V to 5.5V VCC to GND .............................................. - 0.3V to 5.5V Digital Inputs to GND (LTC1755) .............................. - 0.3V to DVCC + 0.3V Digital Inputs to GND (LTC1756) ................................. - 0.3V to VIN + 0.3V
PACKAGE/ORDER I FOR ATIO
TOP VIEW PRES PWR CS NC/NO GND VIN VCC AUX1 AUX2 1 2 3 4 5 6 7 8 9 24 5V/3V 23 CARD 22 ALARM 21 READY 20 DVCC 19 C - 18 C+
ORDER PART NUMBER
TOP VIEW
LTC1755EGN
17 AUX1IN 16 AUX2IN 15 DATA 14 RIN 13 CIN
I/O 10 RST 11 CLK 12
GN PACKAGE 24-LEAD NARROW PLASTIC SSOP TJMAX = 125C, JA = 150C/W
Consult factory for Industrial and Military grade parts.
2
U
U
W
WW
U
W
(Note 1)
CLK, RST, I/O, AUX1, AUX2 to GND .............................. - 0.3V to VCC + 0.3V VCC Short-Circuit Duration ............................... Indefinite Operating Temperature Range (Note 2) .. - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER
PRES PWR GND VIN VCC I/O RST CLK 1 2 3 4 5 6 7 8 16 5V/3V 15 CARD 14 READY 13 C - 12 C + 11 DATA 10 RIN 9 CIN
LTC1756EGN
PART MARKING 1756
GN PACKAGE 16-LEAD NARROW PLASTIC SSOP
TJMAX = 125C, JA = 135C/W
LTC1755/LTC1756
ELECTRICAL CHARACTERISTICS
PARAMETER VIN Operating Voltage DVCC Operating Voltage IVIN Operating Current IDVCC Operating Current IVIN Shutdown Current CONDITIONS
The q denotes specifications which apply over the full specified temperature range, otherwise specificatons are at TA = 25C.
MIN
q q
TYP
MAX 6 5.5
UNITS V V A A A A A V V mA mA mA mA
LTC1755 (VIN = 2.7V to 6V, DVCC = 2V to 5.5V, unless otherwise noted) 2.7 2.0 50 10
ACTIVE State, IVCC = 0 ACTIVE State, DVCC = 3V IDLE State, DVCC = 0V, VIN 3.6V IDLE State, DVCC = 0V, 3.6V < VIN 6V IDLE State, DVCC = 5.5V, VIN 6V 5V/3V = DVCC 5V/3V = 0V 5V/3V = 0V 5V/3V = DVCC 5V/3V = 0V 5V/3V = DVCC 3V VIN 6.0V 3V VIN 6.0V 2.7V VIN 6.0V 2.7V VIN 6.0V PWR to READY, 50% to 50%
q q q q q q q q q q q q q
100 20 1 10 20
VCC Output Voltage IVCC Output Current
4.75 2.80 55 65 55 40
5.00 3.00
5.25 3.20
VCC Turn-On Time VCC Discharge Time to 0.4V VIN Operating Voltage IVIN Operating Current IVIN Shutdown Current VCC Output Voltage IVCC Output Current
COUT = 10F,
2.7 100 2.7 75
12 250 5.5 150 2.5 10
ms s V A A A V V mA mA mA mA
IVCC = 0mA, VCC = 5V, COUT = 10F
LTC1756 (VIN = 2.7V to 5.5V, unless otherwise noted)
q
ACTIVE State, IVCC = 0 IDLE State, VIN 3.6V IDLE State, 3.6V < VIN 5.5V 5V/3V = VIN 5V/3V = 0V 5V/3V = 0V 5V/3V = VIN 5V/3V = 0V 5V/3V = VIN 3V VIN 5.5V 3V VIN 5.5V 2.7V VIN 5.5V 2.7V VIN 5.5V PWR to READY, 50% to 50%
q q q q q q q q q q q
4.75 2.80 55 65 55 40
5.00 3.00
5.25 3.20
VCC Turn-On Time VCC Discharge Time to 0.4V
COUT = 10F,
2.7 100
12 250
ms s
IVCC = 0mA, VCC = 5V, COUT = 10F
3
LTC1755/LTC1756
ELECTRICAL CHARACTERISTICS
PARAMETER High Input Voltage Threshold (VIH) Low Input Voltage Threshold (VIL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) Output Rise/Fall Time Input Current (IIH/IIL) RIN, CIN, PWR, CS, 5V/3V, NC/NO High Input Voltage Threshold (VIH) Low Input Voltage Threshold (VIL) Input Current (IIH/IIL) READY, ALARM, CARD Pull-Up Current (IOH) Low Level Output Voltage (VOL) High Input Voltage Threshold (VIH) Low Input Voltage Threshold (VIL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) Rise/ Fall Time Short-Circuit Current CLK High Level Output Voltage (VOH) Low Level Output Voltage (VOL) CLK Rise/Fall Time CLK Frequency RST High Level Output Voltage (VOH) Low Level Output Voltage (VOL) RST Rise/Fall Time PRES High Input Voltage Threshold (VIH) Low Input Voltage Threshold (VIL) PRES Pull-Up Current PRES Debounce Time (Note 4) (Note 4) VPRES = 0V (Note 4) (Note 4) CONDITIONS (Note 4) (Note 4) Controller Inputs/Outputs DATA, AUX1IN, AUX2IN, DVCC = 3V
The q denotes specifications which apply over the full specified temperature range, otherwise specificatons are at TA = 25C. DVCC = 2V to 5.5V, unless otherwise noted (Note 4).
MIN
q q q q q q
TYP
MAX
UNITS V
DVCC - 0.6 0.5 * DVCC 0.5 * DVCC 0.7 * DVCC 0.3 0.5 -1 0.7 * DVCC 0.5 * DVCC 0.5 * DVCC 0.2 * DVCC -1 250 0.3 0.6 * VCC 0.8 * VCC 0.3 0.5 3.5 VCC - 0.5 0.3 16 5 0.8 * VCC VCC - 0.5V 0.3 0.5 0.7 * DVCC 0.5 * DVCC 0.5 * DVCC 0.2 * DVCC 0.5 40 1 80 7.5 0.5 * VCC 0.5 * VCC 0.8 1 1 0.3
V V V s A V V A nA V V V V V s mA V V ns MHz V V V s V V A ms
Source Current = 20A (Note 4) Sink Current = - 500A (Note 3) Loaded with 30pF, 10% to 90% CS = DVCC
q q q
q
Sink Current = - 20A IIH(MAX) = 20A IIL(MAX) = 1mA Source Current = 20A DATA, AUX1IN, AUX2IN = DVCC Sink Current = - 1mA DATA, AUX1IN, AUX2IN = 0V (Note 3) Loaded with 30pF, 10% to 90% Shorted to VCC Source Current = 100A Sink Current = - 200A CLK Loaded with 30pF CLK Loaded with 30pF Source Current = 200A Source Current = 50A Sink Current = - 200A Loaded with 30pF, 10% to 90%
q
Smart Card Inputs/Outputs I/O, AUX1, AUX2, VCC = 3V or 5V
q q q q q q
q q q q
q q q q
q q q q
Proportional to the 0.68F Charge Pump Capacitor
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1755/LTC1756 are guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: The DATA, AUX1IN, AUX2IN, AUX1, AUX2 and I/O pull-down drivers must sink up to 250A sourced by the internal current sources. Note 4: On the LTC1756, DVCC is internally connected to the VIN pin. Specifications that call out DVCC should be referred to VIN instead.
4
LTC1755/LTC1756 TYPICAL PERFOR A CE CHARACTERISTICS
Power Efficiency vs Input Voltage
100 IL = 35mA TA = 25C DEBOUNCE DELAY (ms) 150 125 75
EFFICIENCY (%)
I/O, AUX1, AUX2 SHORT-CIRCIUT CURRENT (mA)
VCC = 3V 50 VCC = 5V 25
0 3 4 5 VIN INPUT VOLTAGE (V) 6
17556 G01
CARD, READY, ALARM Pull-Up Current vs Temperature
10
PULL-UP CURRENT (A)
8
PULL-UP CURRENT (A)
8 6 4 2 0 2 4 3 DVCC INPUT VOLTAGE (V) 5
17556 G05
INPUT CURRENT (A)
6 DVCC = 5.5V 4
2
DVCC = 3V
DVCC = 2V
0 -50
-25
0 25 50 TEMPERATURE (C)
Oscillator Frequency vs Temperature
1100
OSCILLATOR FREQUENCY (kHz) OSCILLATOR FREQUENCY (kHz)
1000 VIN = 5V 900 800 VIN = 2.7V 700 600 500 -50 VIN = 3.3V
SUPPLY CURRENT (A)
-25
0 25 50 TEMPERATURE (C)
UW
75
17556 G04
Card Detection Debounce Period vs Temperature
CFLY = 0.68F 3.6
I/O, AUX1, AUX2 Short-Circuit Current vs Temperature
VCC = 5V VIN = 3V
100 75 50 25 0 -50
VIN = 6V VIN = 3.3V VIN = 2.7V
3.5
3.4
-25
0 25 50 TEMPERATURE (C)
75
100
3.3 -50
-25
0 25 50 TEMPERATURE (C)
75
100
17556 G02
17556 G03
PRES Pin Pull-Up Current vs DVCC
12 10 VPRES = 0V TA = 25C
35 30
DVCC Input Current vs DVCC Voltage
VPRES = 0V
TA = -40C 25
TA = 25C TA = 85C
20 15 10 5
100
1
2
6 3 4 5 DVCC INPUT VOLTAGE (V)
7
17556 G02
Oscillator Frequency vs Input Voltage
1100 1000 TA = 85C 900 TA = 25C 800 700 600 500 TA = - 40C 60 70
VIN Supply Current vs Temperature
VIN = 3.3V ICC = 0
50
75
100
2.5
3.0
5.0 3.5 4.0 4.5 VIN INPUT VOLTAGE (V)
5.5
40 -50
-25
0 25 50 TEMPERATURE (C)
75
100
17556 G07
17556 G07
17556 G09
5
LTC1755/LTC1756 TYPICAL PERFOR A CE CHARACTERISTICS
DVCC, VIN Supply Current In Shutdown
9.0 7.5 INPUT CURRENT (A) 6.0 4.5 3.0 VIN 1.5 0 INPUT CURRENT (A) VIN = 3V TA = 25C 1.0
0
1
PI FU CTIO S
LTC1755/LTC1756
PRES (Pin 1): (Input) Connects to the Smart Card acceptor's PRESENT indicator switch to detect if a card is inserted. This pin has a pull-up current source so that a grounded switch can be detected with no external components. The pull-up current source is nonlinear, delivering higher current when the PRES pin is above 1V but very little current below 1V. This helps resist false card indications due to leakage current. The activation state of the PRES pin can be set by the NC/NO pin so that both normally open (NO) and normally closed (NC) switches are easily recognized (see NC/NO pin description). DVCC sets the logic reference level for the PRES pin. PWR (Pin 2): (Input) A low on the PWR pin places the LTC1755/LTC1756 in the ACTIVE state enabling the charge pump. The READY pin indicates when the card supply voltage (VCC) has reached its final value and communication with the Smart Card is possible. The reset and clock channels are enabled after READY goes low. The three I/ O channels are also enabled only after READY goes low, however they may be disabled separately via the CS pin (CS is not available on the LTC1756). The falling edge of PWR latches the state of the 5V/3V pin. After PWR is low, changes on the 5V/3V pin are ignored.
6
UW
2
VIN Shutdown Current vs Input Voltage
DVCC = 0 TA = 25C
0.8
0.6
DVCC
0.4
0.2
5 3 4 DVCC INPUT VOLTAGE (V)
6
17556 G10
0
0
1
2 3 4 INPUT VOLTAGE (V)
5
6
17556 G11
U
U
U
CS (Pin 3, LTC1755 Only): (Input) The CS pin enables the three bidirectional I/O channels of the LTC1755. When the I/O channels are disabled the Smart Card pins (I/O, AUX1, AUX2) are forced to logic one and the controller pins (DATA, AUX2IN, AUX1IN) are high impedance. CS can be brought low along with PWR when the device is first enabled, however communication with the Smart Card is inhibited until VCC reaches its final value as indicated by a low on the READY pin. CS does not affect the charge pump, CLK or RST channels. On the LTC1756, CS is internally connected to the PWR pin. DVCC sets the logic reference level for the CS pin. NC/NO (Pin 4, LTC1755 Only): (Input) This pin controls the activation level of the PRES pin. When it is high (DVCC) the PRES pin is active high. When it is low (GND) the PRES pin is active low. In either case the presence of a Smart Card is indicated by a low on the CARD output. When a ground side normally open (NO) switch is used the NC/NO pin should be grounded. When a ground side normally closed (NC) switch is used the NC/NO pin should be connected to DVCC. The LTC1756 is permanently configured to accept a normally open switch.
LTC1755/LTC1756
PI FU CTIO S
Note: If a normally closed switch is used, a small current (several microamperes) will flow through the switch whenever a Smart Card is not present. For ultralow power consumption in shutdown, a normally open switch is optimum. DVCC sets the logic reference level for the NC/NO pin. GND (Pins 5/3): Ground Reference for the IC. This pin should be connected to a low impedance ground plane. Bypass capacitors for VIN and VCC should be in close proximity to the GND pin. VIN (Pins 6/4): Supply Voltage for the Charge Pump. May be between 2.7V and 6V. A 10F low ESR ceramic bypass capacitor is required on this pin for optimum performance. VCC (Pins 7/5): Regulated Smart Card Supply Voltage. This pin should be connected to the Smart Card VCC contact. The 5V/3V pin determines the VCC output voltage. The VCC pin is protected against short circuits by comparing the actual output voltage with an internal reference voltage. If VCC is below its correct level (for as little as 5s) the LTC1755/LTC1756 switch to the Alarm state (see the State Diagram). The VCC pin requires a 10F charge storage capacitor to ground. For optimum performance a low ESR ceramic capacitor should be used. During the Idle and Alarm states the VCC pin is rapidly discharged to ground to comply with the deactivation requirements of the EMV and ISO-7816 specifications. AUX1 (Pin 8, LTC1755 Only): (Input/Output) Smart Card Side Auxiliary I/O Pin. This pin is used for auxiliary bidirectional data transfer between the microcontroller and the Smart Card. It has the same characteristics as the I/O pin. AUX2 (Pin 9, LTC1755 Only): (Input/Output) Smart Card Side Auxiliary I/O Pin. This pin is used for auxiliary bidirectional data transfer between the microcontroller and the Smart Card. It has the same characteristics as the I/O pin. I/O (Pins 10/6): (Input/Output) Smart Card Side Data I/O Pin. This pin is used for bidirectional data transfer between the microcontroller and the Smart Card. It should be connected to the Smart Card I/O contact. The Smart Card I/O pin must be able to sink up to 250A when driving the I/O
U
U
U
LTC1755/LTC1756
pin low due to the pull-up current source. The I/O pin becomes a low impedance to ground during the Idle state. It does not become active until READY goes low indicating that VCC is stable. Once READY is low the I/O pin is protected against short circuits to VCC by current limiting to 5mA maximum. The DATA-I/O channel is bidirectional for half-duplex transmissions. Its idle state is H-H. Once an L is detected on one side of the channel the direction of transmission is established. Specifically, the side which received an L first is now the input, and the opposite side is the output. Transmission from the output side back to the input side is inhibited, thereby preventing a latch condition. Once the input side releases its L, both sides return to H, and the channel is now ready for a new L to be transmitted in either direction. If an L is forced externally on the output side, and it persists until after the L on the input side is released, this illegal input will not be transmitted to the input side because the transmission direction will not have changed. The direction of transmission can only be established from the idle (H-H) state and is determined by the first receipt of an L on either side. RST (Pins 11/7): (Output) Level-Shifted Reset Output Pin. This pin should be connected to the Smart Card RST contact. The RST pin becomes a low impedance to ground during the Idle state (see the State Diagram). The reset channel does not become active until the READY signal goes low indicating that VCC is stable. Short-circuit protection is provided on the RST pin by comparing RST with RIN. If these signals differ for several microseconds then the LTC1755/LTC1756 switch to the Alarm state. This fault checking is only performed after the VCC pin has reached its final value (as indicated by the READY pin). CLK (Pins 12/8): (Output) Level-Shifted Clock Output Pin. This pin should be connected to the Smart Card CLK contact. The CLK pin becomes a low impedance to ground during the Idle state (see the State Diagram). The clock channel does not become active until the READY signal goes low indicating that VCC is stable. Short-circuit protection is provided on the CLK pin by comparing CLK with CIN. If these signals differ for several
7
LTC1755/LTC1756
PI FU CTIO S
microseconds then the LTC1755/LTC1756 switch to the Alarm state. This fault checking is only performed after the VCC pin has reached its final value (as indicated by the READY pin). The clock channel is optimized for signal integrity in order to meet the stringent duty cycle requirements of the EMV specification. Therefore, to reduce power in low power applications, clock stop mode is recommended when data is not being exchanged. CIN (Pins 13/9): (Input) Clock Input Pin from the Microcontroller. During the Active state this signal appears on the CLK pin after being level-shifted and buffered. DVCC sets the logic reference level for the CIN pin. RIN (Pins 14/10): (Input) Reset Input Pin from the Microcontroller. During the Active state this signal appears on the RST pin after being level-shifted and buffered. DVCC sets the logic reference level for the RIN pin. DATA (Pins 15/11): (Input/Output) Microcontroller Side Data I/O Pin. This pin is used for bidirectional data transfer between the microcontroller and the Smart Card. The microcontroller data pin must be open drain and must be able to sink up to 250A when driving the DATA pin low due to the pull-up current source. The DATA pin becomes high impedance during the Idle state or when CS is high (see the State Diagram). It does not become active until the READY signal goes low indicating that VCC is stable. AUX2IN (Pin 16, LTC1755 Only): (Input/Output) Microcontroller Side Auxiliary I/O pin. This pin is used for bidirectional auxiliary data transfer between the microcontroller and the Smart Card. It has the same characteristics as the DATA pin. AUX1IN (Pin 17, LTC1755 Only): (Input/Output) Microcontroller Side Auxiliary I/O Pin. This pin is used for bidirectional auxiliary data transfer between the microcontroller and the Smart Card. It has the same characteristics as the DATA pin. C +, C - (Pins 18/12, 19/13): Charge Pump Flying Capacitor Terminals. Optimum values for the flying capacitor range from 0.68F to 1F. Best performance is achieved with a low ESR X7R ceramic capacitor.
8
U
U
U
LTC1755/LTC1756
DVCC (Pin 20, LTC1755 Only): Supply Voltage for the Microcontroller Side Digital Input and Input/Output Pins (Typically 3V). If the charge pump input pin (VIN) is powered from the same source as the microcontroller, then DVCC should be connected directly to VIN. In this case only one (10F) input bypass capacitor is needed for the LTC1755. If the DVCC pin is powered separately then it should be bypassed separately with a 0.1F capacitor. The DVCC pin may be between 2V and 5.5V. The DVCC pin is monitored for adequate voltage. If DVCC drops below approximately 1.5V the LTC1755 automatically enters the Idle state. On the LTC1756, DVCC is connected internally to VIN. READY (Pins 21/14): (Output) Readiness Indicator of the Smart Card Supply Voltage (VCC). When the LTC1755/ LTC1756 are placed in the Active state the soft-start feature slowly ramps the VCC voltage. A low on the READY pin indicates that VCC has reached its final value. The READY pin also indicates if the LTC1756 is in Alarm mode. The LTC1756 detects faults such as VCC underrange for at least 5s, overtemperature shutdown, CLK or RST invalid output levels and card removal during Active state. CLK or RST invalid and overtemperature faults are detected only after VCC has reached its final value. VCC underrange and card removal during Active faults are detected at any time during the Active period (i.e., once PWR = 0V). If the LTC1756 has been activated normally and VCC, the card voltage, has reached its final value then READY will go low indicating normal operation. If, following this, a fault occurs and the LTC1756 enters the Alarm state, the READY pin will return high. In the event that a fault precedes the activation of VCC, such as a direct short circuit from VCC to GND, the LTC1756 will attempt to operate until the fault is detected and then automatically shut down and enter the Alarm state. In this case the READY pin will never go low after the command to start the smart card is given (i.e., PWR = 0V). If the LTC1755/LTC1756 enter the Alarm state they can only be cleared by returning the PWR pin high.
LTC1755/LTC1756
PI FU CTIO S
The READY pin is configured as an open-drain pull-down with a weak pull-up current source. This permits wiredOR connections of multiple LTC1755/LTC1756s to a single microcontroller. ALARM (Pin 22, LTC1755 Only): (Output) A low on this pin indicates that a fault has occurred and that the LTC1755 is in the Alarm state (see the State Diagram). Possible faults include VCC underrange for at least 5s, overtemperature shutdown, CLK or RST invalid output levels, and card removal during the Active state. CLK or RST invalid and overtemperature faults are detected only after VCC has reached its final value (as indicated by the READY pin). VCC underrange and card removal during Active faults are detected at any time during the Active period (i.e., once PWR = 0V). The ALARM pin is configured as an open-drain pull-down with a weak pull-up current source. This permits wiredOR connections of multiple LTC1755s to a single microcontroller.
U
U
U
LTC1755/LTC1756
CARD (Pin 23/15): (Output) Level-Shifted and Debounced PRES Signal from the Smart Card Acceptor Switch. When a valid card indication appears, this pin communicates the presence of the Smart Card to the microcontroller. The CARD pin has an open-drain active pull-down with a weak pull-up current source for logic-OR connections. The debounce circuit ensures that a card has been present for a continuous period of at least 40ms before asserting CARD low. The CARD pin returns high within 50s of card removal. The PRES pin, in conjunction with the NC/NO pin, determines if a card is present. 5V/3V (Pin 24/16): (Input) Controls the output voltage (VCC) of the DC/DC converter during the Active state. A valid high sets VCC to 5V. A valid low sets VCC to 3V. The 5V/3V pin is latched on the falling edge of the PWR pin. When PWR is low, changes on the 5V/3V pin are ignored. To change the voltage on VCC the LTC1755/LTC1756 must first be returned to the Idle state by bringing the PWR pin high. DVCC sets the logic reference level for the 5V/3V pin.
9
LTC1755/LTC1756
BLOCK DIAGRA W
DVCC
PRES
5V/3V
PWR
CARD
CS (LTC1755 ONLY)
ALARM (LTC1755 ONLY)
NC/NO (LTC1755 ONLY)
READY
GND
DC/DC CONVERTER AND CONTROL LOGIC
DVCC (LTC1755 ONLY, CONNECTED INTERNALLY TO VIN ON LTC1756) C-
VIN
VCC
C+
*
AUX1 (LTC1755 ONLY)
*
AUX1IN (LTC1755 ONLY)
*
AUX2 (LTC1755 ONLY)
*
AUX2IN (LTC1755 ONLY)
*
I/O
*
DATA
RST
RIN
CLK
CIN
*DYNAMIC PULL-UP CURRENT SOURCE
17556 BD
10
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
10kV ESD Protection
All Smart Card pins (CLK, RST, I/O, AUX1, AUX2, VCC and GND) can withstand over 10kV of human body model ESD in situ. In order to ensure proper ESD protection, careful board layout is required. The GND pin should be tied directly to a ground plane. The VCC capacitor should be located very close to the VCC pin and tied immediately to the ground plane. Capacitor Selection The style and value of capacitors used with the LTC1755/ LTC1756 determine several parameters such as output ripple voltage, charge pump strength, Smart Card switch debounce time and VCC discharge rate. Due to the switching nature of a capacitive charge pump, low equivalent series resistance (ESR) capacitors are recommended for the capacitors at VIN and VCC. Whenever the flying capacitor is switched to the VCC charge storage capacitor, considerable current flows. The product of this high current and the ESR of the output capacitor can generate substantial voltage spikes on the VCC output. These spikes may cause problems with the Smart Card or may interfere with the regulation loop of the LTC1755/ LTC1756. Therefore, ceramic or tantalum capacitors are recommended rather than higher ESR aluminum capacitors. Between ceramic and tantalum, ceramic capacitors generally have the lowest ESR. Some manufacturers have developed low ESR tantalum capacitors but they can be expensive and may still have higher ESR than ceramic types. Thus, while they cannot be avoided, ESR spikes will typically be lowest when using ceramic capacitors. For ceramic capacitors there are several different materials available to choose from. The choice of ceramic material is generally based on factors such as available capacitance, case size, voltage rating, electrical performance and cost. For example, capacitors made of Y5V material have high packing density, which provides high capacitance for a given case size. However, Y5V capacitors tend to lose considerable capacitance over the - 40C to 85C temperature range. X7R ceramic capacitors are more stable over temperature but don't provide the high packing density. Therefore, large capacitance values are generally not available in X7R ceramic.
U
The value and style of the flying capacitor are important not only for the charge pump but also because they provide the large debounce time for the Smart Card detection channel. A 0.68F X7R capacitor is a good choice for the flying capacitor because it provides fairly constant capacitance over temperature and its value is not prohibitively large. The charge storage capacitor on the VCC pin determines the ripple voltage magnitude and the discharge time of the Smart Card voltage. To minimize ripple, generally, a large value is needed. However, to meet the VCC discharge rate specification, the value should not exceed 20F. A 10F capacitor can be used but the ripple magnitude will be higher leading to worse apparent DC load regulation. Typically a 15F to 18F Y5V ceramic capacitor is the best choice for the VCC charge storage capacitor. For best performance, this capacitor should be connected as close as possible to the VCC and GND pins. Note that most of the electrostatic discharge (ESD) current on the Smart Card pins is absorbed by this capacitor. The bypass capacitor at VIN is also important. Large dips on the input supply due to ESR may cause problems with the internal circuitry of the LTC1755/LTC1756. A good choice for the input bypass capacitor is a 10F Y5V style ceramic Dynamic Pull-Up Current Sources The current sources on the bidirectional pins (DATA, AUX2IN, AUX1IN, I/O, AUX2 and AUX1) are dynamically activated to achieve a fast rise time with a relatively small static current (Figure 1). Once a bidirectional pin is relinquished, a small start-up current begins to charge the node. An edge rate detector determines if the pin is
VCC OR DVCC
W
UU
+
ISTART
VREF
-
V t BIDIRECTIONAL PIN
17556 F01
Figure 1. Dynamic Pull-Up Current Sources
11
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
released by comparing its slew rate with an internal reference value. If a valid transition is detected, a large pull-up current enhances the edge rate on the node. The higher slew rate corroborates the decision to charge the node thereby effecting a dynamic form of hysteresis. Once the node has reached the power supply voltage the internal comparator requires several hundred nanoseconds to reset. Pulling down on the pin before the reset delay expires will result in a momentary contention and a higher current flow. Therefore, the comparator delay sets the upper limit on the maximum data rate of the bidirectional channels to about 500kHz. The dynamic pull-up current sources are designed to trigger with as much as 50pF of capacitive load on the bidirectional pins. At approximately 90pF (or greater), the edge rate on the node will be insufficient to trigger the edge rate detector and the node will only ramp up at a rate given by the ISTART current source and the load capacitance. In these instances the edge rate of the bidirectional pin may not meet the requirements of existing smart card standards. Therefore, it is recommended that the sum of both explicit and parasitic capacitances on the bidirectional pins be kept below 50pF. If excessive capacitance (either explicit or parasitic) is present on the bidirectional pins, the starting pull-up current must also be increased. This can be accomplished with a pull-up resistor to the respective supply. For the smart card side (I/O, AUX1 and AUX2), the pull-up resistor should be connected to VCC. For the microcontroller side (DATA, AUX1IN and AUX2IN), the pull-up resistor should be connected to DVCC on the LTC1755 (VIN on the LTC1756). To maintain an edge rate of approximately
CS DVCC
DATA TO MICROCONTROLLER BIDIRECTIONAL LATCH 3.5mA
17756 F02
Figure 2. Bidirectional Channel Simplified Block Diagram
12
U
5V/s, the following expression for RPULL-UP should be applied:
W
UU
RPULL-UP =
(CPAR - 50pF)(5 * 106 )
VSUPPLY - 1V
where CPAR is the extra capacitance on the bidirectional pin and VSUPPLY is the minimum local supply for the bidirectional pin. For example, on the smart card side, 3V should be assumed for VSUPPLY. Note that the addition of a pull-up resistor will give a higher output voltage when the bidirectional pin pulls down. Care should be taken so that the VIL or VOL specifications are not compromised with this technique. Bidirectional Channels As described in Pin Functions (Pins 10/6), the bidirectional channels allow transmission in only one direction at a time. Figure 2 shows a simplified block diagram of one of the three bidirectional channels. The three channels operate in an identical fashion. Figure 3 shows an example of normal transmit and receive operations as well as the two possible collision scenarios. If a channel is activated from one direction and an L is imposed in the other direction before both sides return H a collision results. The result of the collision is that the receiving side (Slave Side) will remain low until it is released, but the transmitting side (first side to go low or Master Side), will be allowed to return high if released. The colliding L externally imposed on the slave side will not be transmitted back through the channel.
READY VCC
CHARGE PUMP
I/O TO SMART CARD
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
I2CTM Compatibility Some smart cards still require I2C compatibility. In the I2C format it is permissible to impose an L before the signal line has returned H. This is used, for example, as an acknowledge signal. Such a scenario will cause a collision as shown in Figure 3. Figure 4 shows an analog level translation technique that can be used along with the LTC1755 to support I2C smart cards. In this technique it is important to connect the gate of the external MOSFET to the lower of the two supplies (i.e., the lower of VCC or DVCC). If DVCC is operating from a fixed 5V supply, the gate of MN1 should be connected to VCC. If DVCC is operating from a regulated 3.3V supply, the gate of MN1 should be connected to DVCC. In the latter case, the gate may need to be connected to a digital signal ranging from 0V to DVCC so that it can be disabled when the LTC1755 is in shutdown. Otherwise, the the LTC1755 will try to assert an L on the microcontroller side of the channel when it is in shutdown. Supporting Synchronous and Asyncronous Cards In synchronous/asynchronous applications it is necessary to switch the CLK pin of the card socket from a free running asynchronous clock to a controlled syncronous clock. To avoid glitches and pulses shorter than the minimum allowed pulse width, the circuit shown in Figure 5 should be used as a clock selection circuit. Note that for this circuit to be effective the SYNC input should be held constant while switching the ASYNC\SYNC control signal. Low Power Operation
17556 F05
The LTC1755/LTC1756 are inherently low power devices. When there is no Smart Card present the supply current is
DATA
I/O
NORMAL TRANSMIT
NORMAL RECEIVE
Figure 3. Possible Bidirectional Channel Scenarios
U
less than 10A. If DVCC is 0V the current drops below 1A. When a Smart Card is present the LTC1755/LTC1756 operate with a quiescent current of only 60A, thus the majority of power is consumed by charge pump losses and the card itself. If the card can be made to consume less power during idle times a significant power savings will be achieved. Whenever possible Clock Stop Mode should be used (or alternatively a very low "idling" clock speed). Furthermore, in the Active state, the bidirectional pins should all be relinquished whenever possible since there is some static current flow when a bidirectional pin is pulled down.
I2C is a trademark of Philips Electronics N.V.
W
UU
5V POWER TO MICROCONTROLLER R1 20k
DVCC
VCC I/O
TO SMART CARD
LTC1755 * MN1 2N7002T1 (MOTOROLA) TN2460T (TEMIC/SILICONIX)
17556 F04
DATA
*CONNECT GATE TO VCC FOR DVCC = 5V APPLICATIONS CONNECT GATE TO DVCC OR DVCC LOGIC LEVEL SIGNAL FOR DVCC 3.3V APPLICATONS
Figure 4. I2C Level Translation Technique
ASYNC SYNC
D
Q Q
D
Q Q
ASYNC IN SYNC IN TO CIN
Figure 5. Glitchless Clock Selection Circuit
I/O PULLED LOW DURING TRANSMIT MODE (COLLISION)
DATA PULLED LOW DURING RECEIVE MODE (COLLISION)
17556 F03
13
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
Overtemperature Fault Protection An overtemperature circuit disables the chip and activates the ALARM pin if the IC's junction temperature exceeds 150C. Self-Start Mode By connecting the CARD pin to the PWR pin, the LTC1755/ LTC1756 can be made to start up automatically when a Smart Card is detected (Figure 6). In this mode, the READY pin becomes an interrupt signal indicating to the microcontroller that a Smart Card is present and that VCC, the charge pump voltage, is at its final value. The Smart Card remains powered as long as it is detected by the PRES pin. When the Smart Card is removed the LTC1755/LTC1756 will automatically be deactivated by the fault detection circuitry. Deactivation Sequence For maximum flexibility the Smart Card can be deactivated either manually or automatically. In manual mode the deactivation is controlled by explicitly manipulating the LTC1755/LTC1756 input and control pins (DATA, AUX1IN, AUX2IN, RIN and CIN followed by PWR and CS). In automatic mode the PWR pin is used to perform the built-in
CARD
PWR READY
1755 F06
TO MICROCONTROLLER
Figure 6. Self-Start Mode
DEACTIVATION DIRECTIVE
GND
VCC
RST
RST = RIN
CLK I/O AUX2 AUX1
CLK = CIN
VIN VCC
17556 F08
I/O = DATA
1755 F07
Figure 7. Deactivation Sequence
14
U
deactivation sequence. Once PWR is brought high the builtin deactivation sequence occurs as shown in Figure 7. In the event of a fault, the LTC1755/LTC1756 automatically implement the built-in deactivation sequence. PC Board Layout For best performance, the VIN and VCC capacitors should be placed as close to the LTC1755/LTC1756 as possible. This will help reduce ringing due to inductance on the VIN and VCC pins that could cause problems with the LTC1755/ LTC1756 control circuitry or Smart Card. Figure 8 illustrates a possible layout technique using only a single layer of the PC board. State Definitions IDLE/DEACTIVATION VCC, RST, CLK, I/O AUX2, AUX1 = L READY, ALARM, DATA, AUX2IN, AUX1IN = Z CARD = PRES NC/NO Once the LTC1755/LTC1756 enter the Idle/Deactivation state the deactivation sequence begins. The deactivation sequence will continue until VCC is discharged to approximately 1V. An activation command (PWR = 0V) will only be acknowledged once this occurs. ALARM/DEACTIVATION Same as Idle/Deactivation except: ALARM = L
Figure 8. Optimum Bypass Capacitor Placement
W
UU
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
The only possible next state is Idle/Deactivation which is achieved by disabling the LTC1755/LTC1756 via the PWR pin (i.e., PWR = DVCC). The alarm indication can be cleared by rapidly cycling the PWR pin. However, a new activation cycle will not begin until VCC is or has dropped below approximately 1V. ACTIVE VCC = 3V or 5V (as determined by the 5V/3V pin) RST = RIN, CLK = CIN I/O, AUX2, AUX1, DATA, AUX2IN, AUX1IN = Ready for data (after READY becomes low) CARD = PRES NC/NO ALARM = H
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 - 0.196* (4.801 - 4.978) 0.009 (0.229) REF
0.015 0.004 x 45 (0.38 0.10) 0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270) 0 - 8 TYP
0.008 - 0.012 (0.203 - 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN Package 24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 - 0.344* (8.560 - 8.738) 0.015 0.004 x 45 (0.38 0.10) 0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270) 0 - 8 TYP 0.053 - 0.068 (1.351 - 1.727) 0.004 - 0.0098 (0.102 - 0.249) 24 23 22 21 20 19 18 17 16 15 1413 0.033 (0.838) REF
0.008 - 0.012 (0.203 - 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
FAULT TIMEOUT Same as Active except: The duration of a fault is being measured. If the fault duration exceeds 5s then the Alarm/Deactivation state follows. If the fault duration is less than 5s, then the device is returned to the Active state.
POWER OFF IDLE DEACTIVATION PWR = 0V PWR = DVCC ACTIVE PRES NC/NO PWR = DVCC NO FAULT FAULT ALARM DEACTIVATION FAULT > 5s or PRES NC/NO FAULT TIMEOUT
1755 F09
U
W
UU
Figure 9. LTC1755/LTC1756 State Diagram
0.053 - 0.068 (1.351 - 1.727)
0.004 - 0.0098 (0.102 - 0.249)
16 15 14 13 12 11 10 9
0.0250 (0.635) BSC
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
GN16 (SSOP) 1098
1
23
4
56
7
8
0.0250 (0.635) BSC
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
GN24 (SSOP) 1098
1
23
4
56
7
8
9 10 11 12
15
LTC1755/LTC1756
TYPICAL APPLICATIO U
Asynchronous Smart Card Interface
3.3V 1 2 3 C3 10F GND VCC I/O SMART CARD RST CLK 7 8 RST CLK RIN CIN 10 9
17556 TA02
SMART CARD PRESENT SWITCH
PRES PWR GND VIN
5V/3V CARD READY C-
16 15 14 13 12 11 C1 0.68F
N.O.
C2 10F
4 5 6
CONTROLLER
LTC1756 VCC I/O C+ DATA
RELATED PARTS
PART NUMBER LTC1514/LTC1515 LTC1516 LTC1555/LTC1556 LTC1754-5 LTC1986 DESCRIPTION Micropower Step-Up/Step-Down Inductorless DC/DC Converters Micropower Regulated 5V Charge Pump SIM Power Supply and Level Translator 5V Charge Pump with Shutdown in SOT-23 3V/5V SIM Power Supply in SOT-23 COMMENTS Regulated Output Up to 50mA, VIN from 2V to 10V, SO-8 Package 5V/50mA Output from 2V to 5V Input, S0-8 Package Step-Up/Step-Down Charge Pump + Generates 3V or 5V VIN from 2.7V to 5.5V, 50mA Output with VIN 3V VIN from 2.6V to 4.4V, 3V/5V Output at 10mA
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
sn17556a 17556fs LT/LCG 0800 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1999

▲Up To Search▲

Price & Availability of LTC1755

	To Download LTC1755 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .